The subject disclosure relates to quantum computing, and more specifically, to quantum circuit design and optimization.
As computer technology advances and conventional computing devices decrease in physical scale, a growing interest has been placed on quantum computing as a technique by which computing technology can continue to advance past the physical limitations of traditional (classical) computers.
Quantum computing algorithms can be designed by first constructing a quantum circuit that includes respective quantum bits (qubits) and respective quantum gates that facilitate interaction between pairs of qubits, and subsequently mapping the constructed quantum circuit onto a quantum computing architecture. In order to execute quantum algorithms on current and near-term hardware, it is desirable to efficiently map quantum circuits onto quantum devices which may have limited local physical connectivity.
The efficiency of compiling a quantum algorithm onto a particular hardware architecture can be measured by, e.g., the gate count and depth of the compiled algorithm. As described in Williams et al., “METHOD AND APPARATUS FOR AUTOMATIC DESIGN OF QUANTUM CIRCUITS,” U.S. Patent Application Publication No. 2006/0123363, the gate count of a quantum circuit can be reduced via “compactification techniques.” Paragraph 83 of Williams et al. states the following:                One embodiment applies deterministic circuit reduction operators to look for a pattern among sub-circuits and/or gates that can be eliminated or rewritten to a more compact gate. Another embodiment computes the circuit for a particular unitary matrix U and also computes the circuit for the inverse matrix of U. These two computed circuits are then examined to determine which is smaller and that circuit is used. Another embodiment is referred to as randomized compactification that uses a heuristic approach to arrive at a compact circuit.In addition to optimizing the gate count associated with a quantum circuit, there exists a need in the art for techniques that can optimize a circuit for hardware with local interactions, e.g., that leaves the circuit substantially unmodified.        